1. Technical Field
The present invention relates to a test apparatus and a diagnosis method.
2. Related Art
A conventional test apparatus that tests a device under test, such as a semiconductor chip, is provided with an output circuit that inputs a test signal into the device under test and a measurement circuit that measures a response signal from the device under test. For example, the output circuit may generate a test signal that causes the device under test to perform a prescribed operation, and the measurement circuit may judge whether the device under test is operating properly by measuring the response signal of the device under test. Generally, the test apparatus is provided with a plurality of test channels that each include an output circuit and a measurement circuit.
In order to accurately test the device under test, a self diagnosis is desirably performed periodically to determine whether each test channel is operating properly. A conventional test apparatus uses a relatively high-performance digital voltmeter (DVM) or a digital multimeter (DMM) to determine whether each of the test channels is operating properly, as shown in, for example, Japanese Patent Application Publication No. 2002-207066.
This conventional test apparatus, however, is only provided with 1 DVM, DMM, or the like. Therefore, when diagnosing the plurality of test channels, the test apparatus sequentially connects the test channels one at a time to the DVM. Therefore, a long measurement time is required when diagnosing a large number of test channels. The diagnostic time is further increased due to the switching of the test channel being diagnosed. Yet further, since the signal path from the test channels to the DVM is relatively long, the settling time is also increased.